1. Field of the Invention
The present invention relates to an SOI (silicon on insulator) substrate and a manufacturing method thereof. Further, the present invention relates to a semiconductor device manufactured using the SOI substrate.
Note that a semiconductor device in this specification refers to any device which can function by utilizing semiconductor characteristics, and includes electro-optic devices (including EL display devices and liquid-crystal display devices), semiconductor circuits, and electronic devices in its category.
2. Description of the Related Art
With development of VLSI technology, lower power consumption and higher operation speed transcending the scaling law which governs the performance of semiconductor devices using bulk single crystal silicon have been demanded. In order to satisfy these requirements, an SOI structure has received attention in recent years. This technology allows an active region (channel formation region) of a field effect transistor (FET), which has been conventionally formed of bulk single crystal silicon, to be formed of a single crystal silicon thin film. It is considered that a field effect transistor manufactured using an SOI structure has lower parasitic capacitance than a field effect transistor manufactured using a bulk single crystal silicon substrate, which is an advantage in increasing speed and reducing power consumption.
As a method for manufacturing an SOI substrate, a hydrogen ion implantation separation method is known. For example, according to a hydrogen ion implantation separation method disclosed in Japanese Published Patent Application No. 2000-124092, a semiconductor wafer is irradiated with hydrogen ions by an ion implantation method to form a microbubble layer at a given depth, and the microbubble layer is used as a cleavage plane, so that a semiconductor thin film (SOI layer) is bonded to another semiconductor wafer. Furthermore, in addition to thermal treatment for separating the SOI layer, an oxide film is formed over the SOI layer by thermal treatment in an oxidizing atmosphere and then removed, and after that, thermal treatment is performed at 1000 to 1300° C. in a reducing atmosphere to increase bonding strength and reduce surface roughness.
As described above, in the case of manufacturing an SOI substrate by using a hydrogen ion implantation separation method, a semiconductor wafer is cleaved at a microbubble layer and an SOI layer is bonded to another semiconductor wafer. Therefore, in addition to the SOI substrate, a separation wafer is obtained after the SOI layer is separated. A semiconductor wafer, which is a material of an SOI substrate, is expensive; thus, reusing of the separation wafer leads to cost reduction. For example, in Japanese Patent No. 3943782, a technique for reusing a semiconductor wafer, in which an ion implantation layer at a chamfer of a separation wafer is removed and then the separation wafer is polished, has been disclosed.
By manufacturing an SOI substrate using a hydrogen ion implantation separation method, a separation wafer can be reused. However, in an ion implantation method used in a conventional hydrogen ion implantation separation method, hydrogen ions for irradiation of a semiconductor wafer are small in mass, so that hydrogen tends to be implanted at a large depth from the surface of the semiconductor wafer. Accordingly, a separation layer is formed at a large depth from the surface of the semiconductor wafer to function as a cleavage plane, and consequently, the thickness of a separation wafer after separation becomes small and the thickness of a wafer to be reused is also small.
Further, because the hydrogen ions for irradiation of a semiconductor wafer are small in mass, the hydrogen implantation for forming a separation layer is one rate-controlling factor. An attempt to increase the thickness of the separation wafer obtained through separation by implanting hydrogen at a small depth of a semiconductor wafer requires reduction in an accelerating voltage, which leads to deterioration of takt time and degradation of throughput.
Further, when reusing of the separation wafer is repeated, the quality as a semiconductor wafer inevitably deteriorates, which provides a possibility to result in quality deterioration of an SOI substrate manufactured using the semiconductor wafer. In addition, repeated reuse of the separation wafer causes a problem such as generation of a crack in the semiconductor wafer in the process for manufacturing an SOI substrate, decreasing the yield of SOI substrates.